Last year’s publication of IEEE Std 1149.7™, “IEEE Standard for Reduced-pin and Enhanced-functionality Test Access Port and Boundary Scan Architecture,” (often called JTAG) was the result of several years of hard work, but it illustrated the value of the IEEE standardization process as well as our entity program (also known as the “Corporate Program”) for standards development. Working Group Chair, Rob Oshana, who served as the Working Group Chair for the standard, says “The IEEE process gave us the rigor and review methods to make this a much, much better document.” Oshana is a Distinguished Member of Technical Staff at Freescale Semiconductor.
IEEE 1149.7 actually got its start in 2005 at another organization, the MIPI Alliance. “The goal was to develop an interface for mobile industries that used less pins and had less of an interface requirement,” says Oshana, “It was originally commissioned by Nokia, who brought a body of engineers together.” After several months of brainstorming, they realized that by reducing the number of pins on a chip, the standard could apply to a much broader range of companies than just the mobile phone industry. Since MIPI is only devoted to mobile technologies, “we decided to take the standard out of MIPI and into IEEE entity program.”
Most of the original team moved over to the IEEE working group, which grew with the addition of new companies. The standard was re-written three times, first to get it into an IEEE format, and then to improve its technical aspects. “IEEE provided a lot of rigor in this process,” says Oshana. “We discovered some major technical flaws in the document. Comments from the members of the IEEE group made sure the document would stand on its own, and this made it a much better resource for someone to use to build a product.”
The Working Group reached out to IEEE Professional Services , hiring a seasoned IEEE-SA project manager to facilitate the process. This created “a significant advantage,” according to Oshana. “This helped us to navigate the IEEE rules and structures much more easily than if we had to figure this out on our own. It also allowed us to focus on the technical aspects of the standard and offload much of the management and administrative related tasks.”
Over a three year period, the Working Group met biweekly by phone and had quarterly face-to-face meetings. “Most people felt the meetings were very significant, and much better than teleconference meetings,” says Oshana. It all took time, but “that was because we were taking our time with lengthy technical reviews,” he says.
As this article by Corelis helps explain, “The new IEEE 1149.7 standard (cJTAG or Compact JTAG) provides several new features and major benefits to both board designers and embedded engineers, including:
Summary of Major New Features
- Reduced pin count
- Star topology
- Individual device addressing
- Chip level bypass
- Additional power management features
Summary of Major Benefits
- Simplified connections between devices
- Improved support for devices with multiple cores
- Increased debug performance
Ultimately, the standard benefited not just from the rigor provided by the IEEE process, but from the significant connections IEEE brought to the table. Says Oshana, “IEEE helped us to find these people and give us the perspective we wouldn’t have otherwise considered.” Ultimately, he feels the improvements the IEEE process brought to IEEE 1149.7 improved the overall quality and content of the document. “It was a great experience,” he says.
IEEE Std 1149.7™ Landing Page (includes links to purchasing)